Choosing RAM Type

2011-01-28 (updated: 2015-02-04) by Philip
Tags: RAM, ECC, RDIMM

Single Ranked vs. Dual Ranked Memory

SR vs. DR vs. QR

Single Rank (SR) Memory is usually faster than Dual Rank (DR) Memory, especially when using multiple DIMMs. Each rank on a DIMM has a separate set of DRAM chips. SR DIMMs have half as many chips as similar DR DIMMs and may yield better stability, and produce lower heat. QR have twice as many chips as DR, and may require down-clocking the bus a bit.

The number of ranks on any DIMM is the number of independent sets of DRAMs that can be accessed. The ranks cannot be accessed simultaneously as they share the same data path. On a single rank DIMM that has 64 data bits of I/O pins, there is only one set of DRAM chips that are turned on to drive a read or receive a write on all 64‐bits. A dual rank DIMM would have two sets of DRAMs (twice as many chips) and only one of those sets can be accessed at a time. You can consider each "rank" as a separate DRAM module, i.e. a dual rank DIMM is similar to two single rank DIMMs.

DIMMs are commonly manufactured with up to four ranks per module. On a64‐bit (non‐ECC) DIMM made with two ranks, for example, there would be two sets of DRAM that could be accessed at different times. Only one of the ranks can be accessed at a time.

The physical layout of the DRAM chips on the DIMM itself does not necessarily relate to the number of ranks. Sometimes the layout of all DRAM on one side of the DIMM PCB versus both sides is referred to as "single‐sided" versus "double‐sided". These terms may cause confusion as they do not necessarily relate to how the DIMMs are logically organized or accessed (ranks).

In most systems, memory controllers are designed to access the full data bus width of the memory module at the same time. Usually Dual Rank Memory can be used in conjunction with Single Rank Memory, and in some cases with large amounts of memory servers motherboards may actually require you to use a mix of Single and Dual Rank Memory.

Splitting memory into ranks reduces the load on the memory controller, but can also reduce performance. Each rank of memory is accessed separately, so a single DR DIMM in theory is similar to using two SR DIMMs on the same memory channel. In theory, more ranks (ranks per DIMM times sockets per channel) can yield higher performance because instructions can be pipelined to overcome latencies. In practice, with more than two ranks per memory channel synchronization gets sufficiently complex to yield lower performance.

A rank is 64bits wide, with additional 8 bits for ECC modules, for a total of 72 bits. Each such 64/72bit wide data area is refered to a "rank", and usually denoted on the module label as 1Rx4, 2Rx4, 2Rx8, or similar. The "x4" and "x8" refer to the number of banks on the memory component or chip (not necessarily corresponding to the number of individual memory chips on a PCB).

Since a rank is 64/72 bits, an ECC module made from x4 chips will need 18 chips for one Single Rank (18 x 4 = 72). An ECC module made from x8 chips needs only 9 chips for a Single Rank (9 x 8 = 72), or 18 chips for a Dual Rank (18 x 8 = 144 = 2 ranks x 72 bits). A Quad Ranked ECC module with x8 chips would require (36 x 8 = 288 = 4 ranks x 72 bits).

The drawback with higher ranked modules is that servers sometimes have a limit on how many ranks they can address. For example, a server with four memory slots may be limited to a total of eight ranks. This means you can install you can install four Single/Dual Ranked modules, but only two Quad Ranked modules. When installing four or more memory modules, it is almost always better to use Single Ranked modules (provided the chipset/motherboard manufacturer supports them).

ECC Memory

ECC stands for Error Checking and Correction (a.k.a. Errror-Correcting Code memory). To use ECC memory, your motherboard must support it (usually server and high-end workstation motherboards). Most consumer/desktop systems do not support ECC RAM.

DRAM errors are one of the most common hardware causes of crashes and corruption of data. ECC memory is widely used in workstation and server computers to counter electrical or magnetic interference that may cause a single bit of DRAM to spontaneously flip to the opposite state. With ECC memory, the data that is read is always the same as the data that had been written before, even if one or more bits were actually flipped to the wrong state.

The most common error correcting code, a single-error correction and double-error detection (SECDED) Hamming code, allows a single-bit error to be corrected and double-bit errors to be detected. Chipkill ECC is a more effective version that also corrects for multiple bit errors, including the loss of an entire memory chip.

Each ECC memory bank requires 9 memory chips compared to 8 for non-ECC memory, and lowers memory performance by 2-3% depending on applications and implementation. However, modern systems integrate ECC testing into the CPU, generating no additional delay in memory access.

Some non-ECC memory with parity support can detect (but not correct) single-bit errors.

Registered vs. Unbuffered Memory

Registered memory is the counterpart of Unbuffered memory. Calling Registered memory "buffered" is somewhat incorrect. Registered memory is sometimes abbreviated as RDIMM, and unbuffered memory can be abbreviated as UDIMM. Most of today's registered memory is also ECC and common in servers/workstations.

Almost all system memory in today's home PCs is unbuffered memory. With increasing system memory, the stability and performance deterioration of memory is inevitable - the memory controller has to address each memory chip on all modules directly, which results in higher electrical loads. To solve this problem, higher density systems use registered memory instead. Registered memory modules contain registers as a buffer to temporarily hold data (address and command data only) for one clock cycle before it is transferred. This increases the reliability of high-speed data access to high density memory but sacrifices some performance since there is one additional clock cycle between the Chip Select and the Bank Activate command.

The difference between registered memory and unbuffered memory is whether there are such biffers/registers on the memory module. Registers are logic components that buffer the address and command signals going on to the memory module. In registered memory, the memory controller only sees the register (one register per physical bank of memory). In unbuffered memory, the memory controller directly addresses each memory chip on all modules in the system directly.

Registered memory is required by some server and workstation motherboards. It is more efficient, however it introduces a small performance drop as well. For residential use and home PCs, unbuffered memory is used almost exclusively.

Notes:
ECC Registered (RDIMMs) and ECC Unbuffered (UDIMMs) can not be mixed in the same system.
LRDIMM (load-reduction dimm) is another server-type module that contains a memory buffer chip (as opposed to a register) in order to reduce the load on the server memory bus. LRDIMMs support higher densities than RDIMMs.

DDR3 x4 vs x8

This refers to the bit-width of the chip. x8 DIMMs have half as many chips and thus are more energy efficient, may yield better stability and lower heat than x4 DIMMs.

With x8 chips, half as many chips are required on the DIMM. Fewer chips means fewer components, cleaner design, less interference, cleaner signal, and therefore better reliability and more potential for overclocking.

When installing memory modules in "matched" sockets (banks), do not mix x4 and x8 DIMMs. The DIMMs can coexist, as long as they are in separate banks.

Note: You should always refer to your particular motherboard's manual to see exactly what type of memory is supported.

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